Field of the Invention
The present invention relates to a configuration for the measurement of internal voltages in an integrated semiconductor apparatus.
Various internal voltages, which may have values of, for example, 2.3 V, 3.5 V, 0.9 V etc., are required in integrated semiconductor apparatuses, such as memory chips etc. These internal voltages in an integrated semiconductor apparatus must be checked before these apparatuses are delivered to ensure that the integrated semiconductor apparatus operates reliably. In the past, testers have been used for this purpose, each of which contains a DC voltage unit (xe2x80x9cDC Unitxe2x80x9d) that applies a known DC voltage (reference voltage) to the semiconductor apparatus, that is to say a memory chip for example. Such a tester would at the same time measure the internal voltage to be checked. In the above example, an internal voltage of 2.3 V, 3.5 V or 0.9 V would be measured on a pad (contact cushion), that is suitable for this purpose, of the semiconductor apparatus.
The semiconductor apparatuses to be tested, also referred to as DUTs (xe2x80x9cDevice Under Testxe2x80x9d) now require as many DC voltage units as DUTs in order to perform parallel measurements; each DUT is allocated its own DC voltage unit for the parallel measurement.
If the goal is to test the internal voltages in a large number of semiconductor apparatuses, such as SDRAMs, then an equally large number of DC voltage units are required in the tester in order to perform parallel measurements. Such parallel measurement is a precondition for a short measurement time, and this makes the tester extremely complex.
It is accordingly an object of the invention to provide a configuration and a method for the measurement of internal voltages in an integrated semiconductor apparatus which overcomes the above-mentioned disadvantageous of the prior art configurations and methods of this general type, and that enables a large number of such integrated semiconductor apparatuses to be measured in parallel, with a low level of complexity.
With the foregoing and other objects in view there is provided, in accordance with the invention, a configuration for measuring an internal voltage in an integrated semiconductor apparatus. The configuration includes a tester supplying a reference voltage, and a semiconductor apparatus having an internal voltage to be measured and a comparator with a first input, a second input, and an output. The first input of the comparator has the internal voltage to be measured applied thereto. The second input of the comparator has the reference voltage applied thereto, and the output of the comparator is connected to the external tester. The tester is disposed external from the semiconductor apparatus and is configured to determine whether the internal voltage matches or does not match the reference voltage.
The reference voltage can be supplied to the comparator in discrete voltage steps, or as a ramp signal.
The invention thus departs completely from the approach used in the previous prior art; the comparator which compares the internal voltage (Vint) to be measured with a reference voltage (Vref) is moved to the semiconductor apparatus, that is to say to the DUT so that a large number of semiconductor apparatuses or DUTs can be measured in parallel directly, by comparing the one externally supplied reference voltage with the corresponding internal voltage in the respective semiconductor apparatuses. The additional complexity for the comparator is relatively low, and requires only a small surface area on the integrated semiconductor apparatus.
The reference voltage is applied via a pad or contact cushion, and this reference voltage together with the internal voltage to be measured is passed to the inputs of the comparator that is provided in the semiconductor apparatus. The output from this comparator is passed to the outside. This means that the reference voltage is supplied from an external tester, which also records the output signal from the comparator. The output signal can in this case be output directly to the external tester, via a suitable pad. Alternatively, a suitable monitoring signal (for example xe2x80x9chighxe2x80x9d=Vint is greater than Vref; xe2x80x9clowxe2x80x9d=Vint is less than Vref) could also be output via one of the existing input/output channels of the semiconductor apparatus.
If, for example, the output signal from the comparator is at a high level, then this may mean that the internal voltage is less than the reference voltage. On the other hand, if the output signal from the comparator is at a low level, then this means that the internal voltage is higher than the reference voltage.
In order now to measure the internal voltage, one option is to apply the reference voltage in discrete voltage steps, with an external check being carried out with the tester after each voltage step to determine whether the values of the internal voltage and of the reference voltage have already crossed. If such a crossover occurs, then this means that the internal voltage matches the external reference voltage with the accuracy provided by the step widths.
Another option is to apply the reference voltage to the comparator as a ramp signal. In this case, the internal voltage in the semiconductor apparatus corresponds to the reference voltage at the time at which the output from the comparator signals that the internal voltage and the reference voltage have crossed over.
The comparator is preferably a differential amplifier. However, it is, of course possible, to choose any circuit for the comparator which is able to compare the external reference voltage with the internal voltage to be measured.
With the foregoing and other objects in view there is also provided, in accordance with the invention, a method for testing a plurality of integrated semiconductor components, which comprises steps of: providing each of a plurality of integrated semiconductor components with an input for receiving a reference voltage; connecting the input of each of the plurality of integrated semiconductor components in parallel and supplying the reference voltage to each input; for each of the plurality of integrated semiconductor components, measuring a magnitude of a respective internal voltage by comparing the reference voltage with the respective internal voltage; and identifying operability of a respective one of the plurality of integrated semiconductor components as a function of the measured magnitude of the respective internal voltage.
In accordance with an added mode of the invention, a voltage generator which produces the internal voltage is corrected as a function of the measured internal voltage.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a configuration for measurement of internal voltages in an integrated semiconductor apparatus, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.